This is the fourth of a series of SICSA/NAIS Scottish Parallel Computational Mathematics Meetings (SPARC-M) to explore and develop synergies between major Scottish research activities in parallel computational mathematics, e.g. NAIS, HPC-GAP, SCIEnce, Computational Statistics and Cognitive Neuroscience, Vector Processing Languages.
Where: Room 1.70 Earl Mountbatten Buildings, School of Mathematical and Computer Sciences, Heriot-Watt University, Edinburgh EH14 4AS
See these travel instructions and campus map.
When: Thursday April 7th, 2011 (13:30-17:00)
To register, please pick April 7th in the doodle poll for the meeting: http://doodle.com/8yyfv4m6cksnzv2a
To contribute a talk for the meeting, please email title and abstract to: http://www.macs.hw.ac.uk/~hwloidl/test/email.php?name=Hans+Wolfgang+Loidl
|13:30-14:00||Thibaut Lutz, Chris Fensch and Murray Cole||A Stencil Skeleton for Multi-GPU Systems|
|14:00-14:30||Miklos Rasonyi||Fast computation of particle filters on processor arrays|
|14:30-15:00||Chris Brown||Improving your CASH flow: the Computer Algebra SHell|
|15:30-16:00||Patrick Maier||Better Strategies for Parallel Haskell|
|16:00-16:30||Abdallah Al Zain||mHume for Parallel FPGA|
A Stencil Skeleton for Multi-GPU Systems
Thibaut Lutz, Chris Fensch and Murray Cole, University of Edinburgh
We present our work-in-progress skeleton for stencil computations. Our goal is to allow portable, transparent, efficient exploitation of systems comprising multiple CPUs and GPUs, tuning internal skeleton parameters appropriately to each application and system. Our first results are for three real stencil applications, covering a range of complexity and targeting a small system with four GPU devices.
Fast computation of particle filters on processor arrays
Miklos Rasonyi, University of Edinburgh
Particle filters are a state-of-the-art method for the state estimation of non-linear stochastic systems. Recent many-core architectures and cellular processor arrays offer a new paradigm for algorithm development, which provides not only high performance, but also theoretical advances for parallel implementations.
We have developed a new variant of the particle filter algorithm, which suits ideally implementation on a cellular processor array. The new algorithm often performs better than the classical one and a significant gain in running time can be achieved, especially when there is a large number of particles to be simulated.
Improving your CASH flow: the Computer Algebra SHell
Chris Brown, University of St Andrews
This talk describes CASH (the Computer Algebra SHell), a new interface that allows Haskell programmers to access the complete functionality of a number of computer algebra systems directly and in- teractively. Using CASH, Haskell programmers can access previously- unavailable mathematical software, and, in the reverse direction, users of computer algebra systems can exploit the rapidly growing Haskell code base and its rich set of libraries. In particular, CASH provides a simple and effective interface for users of computer algebra systems to parallelise their algorithms using domain-specific skeletons written in Haskell.
Better Strategies for Parallel Haskell
Patrick Maier, Heriot-Watt University
I will present recent work on overhauling and redesigning evaluation strategies, a key abstraction for specifying pure, deterministic parallelism in Haskell. I'll illustrate the use of evaluation strategies on examples, justifying the claim that parallelism in Haskell is "low pain/high gain".
mHume for Parallel FPGA
Abdallah Al Zain, Heriot-Watt University
The formally motivated Hume language, based on the coordination of concurrent automata performing functional computations, was designed to support the development of systems requiring strong assurance that resource bounds are met. mHume is an experimental subset oriented to exploration of running Hume program on FPGAs. In this paper, the deployment of mHume on the FPGA-embedded MicroBlaze architecture is discussed. Preliminary results suggest very fast performance and good scalability compared to microprocessors