This talk will be on 26th April, at the time of 13:15.

HPC, GPU and FPGA programmers today often choose relatively low level programming languages such as CUDA, OpenCL, MPI and C, in the belief that direct control of memory management and thread scheduling is the best approach for high performance. An important disadvantage is that codes need to be rewritten for every new generation of HPC, GPU and FPGA technologies to avoid performance bitrot.

In this talk I will vouch for high level functional languages as an increasingly obvious write-once-run-every-generation programming approach as architectures become ever more heterogeneous. The trend in recent years shows that the key to high performance high level language design is twofold: 1) offering the right abstractions above concrete runtime system and hardware details (and only when such abstractions are needed), and 2) generating code using machine learning technique such that compilers discover the optimal translations from beautiful maps and reductions, to imperative code with ideal (sometimes non-obvious) memory mapping allocations and multithreaded performance.