Title: Parallel programming on the Xeon Phi Many-core Coprocessor
Proposer: Hans-Wolfgang Loidl
Suggested supervisors: Hans-Wolfgang Loidl
Goal:
Evaluate performance of some parallel benchmarks on the new Intel Xeon Phi many-core co-processor, and compare it to the performance achievable on our multi-core servers.
Description:
The new Intel Xeon Phi coprocessor is an accelerator card that promises to boost the performance of the host machine by offloading parallel code to a 61-core processor. It brings affordable many-core technology to standard desktop machines, and claims to be easier to program than other accelerators such GPGPUs.
The goal of this project is to use a set of common parallel benchmark programs, to run them both on the Xeon Phi and on a departmental many-core server, in order to compare performance on both architectures. In a second phase, a simple parallel program should be developed from scratch, using the Xeon Phi's tool support, in order to assess programability of this new architecture.
Resources required: Intel Xeon Phi and a multi-core server, both available in the department.
Degree of difficulty: medium
Background needed: Solid knowledge of C programming, general background on parallel programming.
References:
[1] Intel Xeon Phi